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ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
Equation 3 shows that the apparent output impedance is reduced
by approximately the excess loop gain; therefore, as the frequency
increases, the excess loop gain decreases, and the apparent output
impedance increases. A passive element whose impedance
increases as its frequency increases is an inductor. When a
capacitor is added to the output of an op amp or a reference, it
forms a tuned circuit that resonates at a certain frequency and
results in gain peaking. This can be observed by using a model
The op amp within the ADR43x family uses the classic RC
compensation technique. Monolithic capacitors in an IC are
limited to tens of picofarads. With very large external capacitive
loads, such as 50 μF, it is necessary to overcompensate the op amp.
The internal compensation node is brought out on Pin 7, and
an external series RC network can be added between Pin 7 and
of a semiperfect op amp with a single-pole response and some
pure resistance in series with the output. Changing capacitive
loads results in peaking at different frequencies. For most normal
op amp applications with low capacitive loading (<100 pF), this
V IN
10μF
+
0.1μF
TP
NC
GND
1
2
3
4
ADR43x
TOP VIEW
(Not to Scale)
8
7
6
5
TP
COMP 82k ?
V OUT
TRIM
10nF
0.1μF
effect is usually not observed.
However, references are used increasingly to drive the reference
input of an ADC that may present a dynamic, switching capacitive
load. Large capacitors, in the microfarad range, are used to reduce
shows the ADR431 noise spectrum with various capacitive values
to 50 μF. With no capacitive load, the noise spectrum is relatively
NOTES
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
Figure 32. Compensated Reference
The 82 kΩ resistor and 10 nF capacitor can eliminate the noise
peaking (see Figure 33). The COMP pin should be left
unconnected if unused.
flat at approximately 60 nV/√Hz to 70 nV/√Hz. With various
values of capacitive loading, the predicted noise peaking
becomes evident.
100
C L = 10μF
RC 82k ? AND 10nF
1000
ADR431
NO COMPENSATION
C L = 1μF
RC 82k ? AND 10nF
100
C L = 10μF
C L = 50μF
C L = 1μF
C L = 50μF
RC 82k ? AND 10nF
C L = 0μF
10
10
100
1k
10k
FREQUENCY (Hz)
Figure 33. Noise with Compensation Network
10
10
100
1k
10k
100k
TURN-ON TIME
FREQUENCY (Hz)
Figure 31. Noise vs. Capacitive Loading
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error band
is defined as the turn-on settling time. Two components normally
associated with this are the time for the active circuits to settle
and the time for the thermal gradients on the chip to stabilize.
ADR431.
Rev. J | Page 17 of 24
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制造商:Analog Devices 功能描述:REFERENCE VOLTAGE:2.5V
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ADR431TRZ-EP-R7
制造商:Analog Devices 功能描述:V-Ref Precision 2.5V 10mA 8-Pin SOIC N T/R 制造商:Analog Devices 功能描述:ENHANCED PLASTIC PROCESS - Tape and Reel 制造商:Analog Devices 功能描述:IC VREF SERIES 2.5V 8-SOIC 制造商:Analog Devices Inc. 功能描述:Voltage & Current References Enhanced Plastic Process
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